MTS Design Engineering (Logic Verification)

Posted 13 November 2022
Job type Permanent

Company's Benefits

  • Paid Parental Leave

    Paid Parental Leave

  • Return to Work Policy

    Return to Work Policy

  • Flexible Working Arrangements

    Flexible Working Arrangements

  • Mentorship Program

    Mentorship Program

  • Breastfeeding Rooms

    Breastfeeding Rooms

  • Sponsorship Program

    Sponsorship Program

  • Leadership Development Program

    Leadership Development Program

  • Coaching Program

    Coaching Program

  • Raise Numbers Of Women In Leadership

    Raise Numbers Of Women In Leadership

  • Internal Women's Networking Group

    Internal Women's Networking Group

  • Equal Pay Initiatives

    Equal Pay Initiatives

Job Description

Job Description

About GlobalFoundries

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit


Logic Verification Engineer is working on the logic verification of synthesizable IP and SoC for GLOBALFOUNDRIES internal requirements or design service requirements from GLOBALFOUNDRIES’s worldwide clients. By employing the industry leading tools, state of the art methodology, and innovative GLOBALFOUNDRIES technologies, you will be participating in the front-end logic verification tasks, including verification plan, verification ENV, simulation, debug and documentation.

Your Job

  • In-house digital IP verification

  • Define verification plan, environment architecture and coverage goal

  • Develop verification environment and test cases

  • Debug and achieve coverage closure

Required Qualifications

  • Master degree in EE/CS or related fields.

  • 5 years work experiences of frontend verification or above.

  • Fluent in both written and verbal English.

Preferred Qualifications

  • Familiar with System Verilog & UVM methodology.

  • Familiar with RTL simulation EDA tools and script.

  • Familiar with gate level simulation with SDF and UPF.

  • Good skills in environment and testcase debugging.

GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.

As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.

All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

To ensure that we maintain a safe and healthy workplace for our GlobalFoundries employees, please note that offered candidates who have applied for jobs in Singapore will have to be fully vaccinated prior to their targeted start date. For new hires, the appointment is contingent upon the provision of a copy of their COVID-19 vaccination document, subject to any written request for medical or religious accommodation.

Information about our benefits you can find here: